This application claims priority under 35 U.S.C. xc2xa7xc2xa7119 and/or 365 to Patent Applications 9-8383 and 9-8386 filed in Japan on Jan. 21, 1997; the entire content of which is hereby incorporated by reference.
1. Field of the Invention
This invention relates to an image processor such as a digital copying machine.
2. Description of Prior Art
This application is based on applications Nos. 9-8383 and 9-8386 filed in Japan, the content of which is incorporated hereinto by reference.
Multi-level image data are obtained by reading a document image in an image processor. For an image processor such as a digital copying machine using an electrophotographic process, it is known to convert such multi-level image data to bi-level image data so as to form an image on a paper according to the bi-level image data. For an image processor which transmits the bi-level image data to a monochromatic printer, it is also known that an image processor converts multi-level image data to bi-level image data.
In the above-mentioned image processing for binarizing multi-level image data, it is known that image data are sampled while multi-level image data of a document is read, and real time dither pattern process or error dispersion process is performed by using high speed calculation. However, this technique has a limit on the sampling number of image data according to the calculation speed. It is also known that after all the multi-level image data read on a document is stored in a memory, features used for binarization are extracted from the multi-level image data to be binarized.
However, this technique needs a memory of large storage capacity. Further, it takes a long calculation time because a large amount of data have to be processed at one time.
An object of this invention is to provide an image processor which converts a multi-level image data to a bi-level image fast with a simple structure.
Another object of this invention is to provide an image processor which converts a bi-level image to a multi-level image fast with a simple structure.
In one aspect of the invention of an image processor, multi-level image data are divided into blocks, and compressed in the unit of block. The compressed multi-level image data of a block are converted to compressed bi-level image data without expanding the multi-level image data. For example, the compressed multi-level image data on an image of uniform density are converted to compressed bi-level image data expressed with area gradation.
In a second aspect of the invention of an image processor, the compressed multi-level image data of a block are converted to compressed multi-level image data, without expanding the multi-level image data. For example, the compressed multi-level image data on an image of bi-level image expressed with area gradation are converted to compressed multi-level image data of a half-tone image.
An advantage of the present invention is that conversion from compressed multi-level image data to compressed bi-level image data can be performed in a short time with a memory of a smaller capacity.
Another advantage of the present invention is that conversion from compressed bi-level image data to compressed multi-level image data can be performed in a short time with a memory of a smaller capacity.